Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/393164
Title: Implementation and throughput optimization of various ARQ mechanisms in different channels
Researcher: Kundu, Mayuri
Guide(s): Chakraborty, Swarnendu Kumar
Keywords: Computer Science
Engineering and Technology
Optimization of various ARQ mechanisms
University: National Institute of Technology Arunachal Pradesh
Completed Date: 2020
Abstract: Automatic Repeat Request (APC) is a suitable solution for reliable data communication over wireless channel. But the main challenge is to achieve optimized throughput in error free data delivery. Several researchers are still working to solve this issue. This work is a humble approach to address the problem and find out a better solution in wireless data communication. Different modified techniques of ARQ are addressing the above said problems and comparative study of different Aggressive Packet Combining (APC) schemes has been done to understand the better approach. During this course of investigation it has been realized that achieving optimized energy and bandwidth is also playing a major role. During the data transmission, noise and different issues raises the problem of fading, it is also required to check the behaviour of different scheme in various fading channels. The combined ARQ and Forward Error Correction (FEC) technique is called Hybrid Automatic Repeat Request (HARQ) which is also a significant technique to solve the wireless data communication short comings. The behaviour of HARQ is studied in Rayleigh Fading Channel and comparative studies have also shown better results. The mathematical representation of few modified APC scheme was needed. newlineThe mathematical modelling was needed for comparative study on throughput. Besides the major drawback of APC scheme was same bit location error detection as the foundation concept is majority bit logic. This issue has been addressed through different basic cyclic bit shift approach. Thus a new protocol is proposed based on cyclic shift to combat the problem associated with same bit location error detection in APC. newline newline
Pagination: xxvi, 77
URI: http://hdl.handle.net/10603/393164
Appears in Departments:Department of Computer Science and Engineering

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01_title.pdfAttached File339.54 kBAdobe PDFView/Open
02_declaration.pdf439.8 kBAdobe PDFView/Open
03_certificate.pdf418.11 kBAdobe PDFView/Open
04_acknowledgement.pdf312.15 kBAdobe PDFView/Open
05_table of contents.pdf267.29 kBAdobe PDFView/Open
06_list of figure and table.pdf364.15 kBAdobe PDFView/Open
08_chapter 1.pdf416.44 kBAdobe PDFView/Open
09_chapter 2.pdf806.68 kBAdobe PDFView/Open
10_chapter 3.pdf1.07 MBAdobe PDFView/Open
11_chapter 4.pdf840.6 kBAdobe PDFView/Open
12_chapter 5.pdf1.03 MBAdobe PDFView/Open
13_list of publication.pdf269.12 kBAdobe PDFView/Open
80_recommendation.pdf504.13 kBAdobe PDFView/Open
abstract.pdf263.56 kBAdobe PDFView/Open
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