1. Shodhganga@INFLIBNET
  2. Jawaharlal Nehru Technological University, Anantapuram
  3. Department of Electrical Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/39035
Title: Fpga pso based implementation of she technique to minimize lower order harmonics in mv drives
Researcher: V. Joshi Manohar
Guide(s): Prof. K.S. R. Anjaneyulu
Keywords: Electrical Engineering
FPGA-PSO based Implementation
SHE Technique to Minimize Lower Order Harmonics in MV Drives
Upload Date: 15-Apr-2015
University: Jawaharlal Nehru Technological University, Anantapuram
Completed Date: 17-02-2014
Abstract: No newline
Pagination: xvii, 151 P
URI: http://hdl.handle.net/10603/39035
Appears in Departments:Department of Electrical Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File146.02 kBAdobe PDFView/Open
02_decl & certificates.pdf7.74 kBAdobe PDFView/Open
03_acknowlegement.pdf7.15 kBAdobe PDFView/Open
04_contents.pdf6.63 kBAdobe PDFView/Open
05_preface.pdf9.58 kBAdobe PDFView/Open
06_abstract.pdf49.45 kBAdobe PDFView/Open
07_list of tables and figures.pdf135.02 kBAdobe PDFView/Open
08_chapter 1.pdf5.59 MBAdobe PDFView/Open
09_chapter 2.pdf894.99 kBAdobe PDFView/Open
10_chapter 3.pdf534.35 kBAdobe PDFView/Open
11_chapter 4.pdf304 kBAdobe PDFView/Open
12_chapter 5.pdf10.52 MBAdobe PDFView/Open
13_chapter 6.pdf2.24 MBAdobe PDFView/Open
14_chapter 7.pdf17.36 kBAdobe PDFView/Open
17_references.pdf28.19 kBAdobe PDFView/Open
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