Design of Hetero Interface Band To Band Tunneling Transistors for Low Power Applications

Abstract

Over 50 years of continuous transistor scaling, transistor density passed over 15 billion (1.5× 1011 devices/cm2) intensely demands low power as the crucial performance benchmark for designing microprocessors. However, circuit, as well as system-level design, has been implemented to diminish power, and the primary limitation in comprehensive energy efficacy of a system has been deeply entrenched in the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) working principle along with its indelible conduction mechanism: the introduction of charge carriers by thermal distribution will not permit switching characteristics superior to 60 mV/dec at 300 K newline