Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/383973
Title: Performance Evaluation Of Low Power High Speed Arithmetic Logic Circuits In Nanotechnology
Researcher: Divya Tripathi
Guide(s): Subodh Wairya
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Dr. A.P.J. Abdul Kalam Technical University
Completed Date: 2022
Pagination: 
URI: http://hdl.handle.net/10603/383973
Appears in Departments:dean PG Studies and Research

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80_recommendation.pdfAttached File650.99 kBAdobe PDFView/Open
abstract.pdf217.1 kBAdobe PDFView/Open
aknowladgement.pdf317.39 kBAdobe PDFView/Open
a_title_page.pdf12.21 kBAdobe PDFView/Open
certificate.pdf101.4 kBAdobe PDFView/Open
chapter-1.pdf158.06 kBAdobe PDFView/Open
chapter-2.pdf386.75 kBAdobe PDFView/Open
chapter-3.pdf1.17 MBAdobe PDFView/Open
chapter-4.pdf984.65 kBAdobe PDFView/Open
chapter-5.pdf1.03 MBAdobe PDFView/Open
chapter-6.pdf1.01 MBAdobe PDFView/Open
chapter-7.pdf487.41 kBAdobe PDFView/Open
chapter-8.pdf316.97 kBAdobe PDFView/Open
chapter9.pdf392.64 kBAdobe PDFView/Open
declaration.pdf112.88 kBAdobe PDFView/Open
list of table.pdf377.37 kBAdobe PDFView/Open
table of contents.pdf235.85 kBAdobe PDFView/Open
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