1. Shodhganga@INFLIBNET
  2. Vellore Institute of Technology, Vellore
  3. School of Electrical Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/37840
Title: Low power test data compression techniques for digital vlsi circuits
Researcher: Sivanantham, S
Guide(s): Mallick, Partha Sharathi
Keywords: Circuits
Compression
Data
Digital
Power
Techniques
Upload Date: 23-Mar-2015
University: VIT University
Completed Date: 2014
Abstract: Abstract available
Pagination: 113p.
URI: http://hdl.handle.net/10603/37840
Appears in Departments:School of Electrical Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File33.67 kBAdobe PDFView/Open
02_declaration.pdf24.03 kBAdobe PDFView/Open
03_certificate.pdf24.14 kBAdobe PDFView/Open
04_abstract.pdf26.79 kBAdobe PDFView/Open
05_acknowledgement.pdf24.87 kBAdobe PDFView/Open
06_content.pdf25.95 kBAdobe PDFView/Open
07_figure.pdf16.63 kBAdobe PDFView/Open
08_table.pdf35.05 kBAdobe PDFView/Open
09_abbreviation.pdf25.47 kBAdobe PDFView/Open
10_chapter 1.pdf600.04 kBAdobe PDFView/Open
11_chapter 2.pdf124.24 kBAdobe PDFView/Open
12_chapter 3.pdf273.88 kBAdobe PDFView/Open
13_chapter 4.pdf680.66 kBAdobe PDFView/Open
14_chapter 5.pdf471.68 kBAdobe PDFView/Open
15_chapter 6.pdf155.24 kBAdobe PDFView/Open
16_chapter 7.pdf29 kBAdobe PDFView/Open
17_publication.pdf24.79 kBAdobe PDFView/Open
18_reference.pdf50.84 kBAdobe PDFView/Open
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