1. Shodhganga@INFLIBNET
  2. Swami Ramanand Teerth Marathwada University
  3. Department of Electronics and Telecommunication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/375950
Title: Design and Implementation of Some Digital Signal Processing Blocks
Researcher: Ladekar Mahesh Yeshwantrao
Guide(s): Joshi Y. V. and Manthalkar R. R.
Keywords: Computer Science
Engineering and Technology
Telecommunications
University: Swami Ramanand Teerth Marathwada University
Completed Date: 2021
Abstract: newline
Pagination: 128p
URI: http://hdl.handle.net/10603/375950
Appears in Departments:Department of Electronics and Telecommunication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File189.13 kBAdobe PDFView/Open
02_certificate.pdf244.61 kBAdobe PDFView/Open
03_abstract.pdf598.04 kBAdobe PDFView/Open
04_declaration.pdf212.77 kBAdobe PDFView/Open
05_acknowledgement.pdf807.97 kBAdobe PDFView/Open
06_contents.pdf715.57 kBAdobe PDFView/Open
07_list_of_tables.pdf266.78 kBAdobe PDFView/Open
08_list_of_figures.pdf531.87 kBAdobe PDFView/Open
09_abbreviations.pdf338.09 kBAdobe PDFView/Open
10_chapter 1.pdf10.54 MBAdobe PDFView/Open
11_chapter 2.pdf3.06 MBAdobe PDFView/Open
12_chapter 3.pdf5.15 MBAdobe PDFView/Open
13_chapter 4.pdf5.92 MBAdobe PDFView/Open
14_chapter 5.pdf7.22 MBAdobe PDFView/Open
15_conclusion.pdf2.16 MBAdobe PDFView/Open
16_summary.pdf216.58 kBAdobe PDFView/Open
17_appendices.pdf1.07 MBAdobe PDFView/Open
18_bibliography.pdf5.83 MBAdobe PDFView/Open
80_recommendation.pdf101.67 kBAdobe PDFView/Open
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