1. Shodhganga@INFLIBNET
  2. Koneru Lakshmaiah Education Foundation
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/375899
Title: High Performance Double Precision Floating Point Computation Using FPGA Based Accelerators and AES Model
Researcher: Boppidi Srikanth
Guide(s): M Siva Kumar, J V R Ravindra
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Koneru Lakshmaiah Education Foundation
Completed Date: 2021
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/375899
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
10_ chapter 1.pdfAttached File635.62 kBAdobe PDFView/Open
11_ chapter 2.pdf1.12 MBAdobe PDFView/Open
12_ chapter 3.pdf1.59 MBAdobe PDFView/Open
13_ chapter 4.pdf1.17 MBAdobe PDFView/Open
14_ chapter 5.pdf690.52 kBAdobe PDFView/Open
15_ chapter 6.pdf829.77 kBAdobe PDFView/Open
16_ chapter 7.pdf186.5 kBAdobe PDFView/Open
1_title.pdf180.49 kBAdobe PDFView/Open
2_ declaration.pdf161.42 kBAdobe PDFView/Open
3_certificate.pdf150.13 kBAdobe PDFView/Open
4_acknowledgement.pdf9.1 kBAdobe PDFView/Open
5_ abstract.pdf85.03 kBAdobe PDFView/Open
6_contents.pdf182 kBAdobe PDFView/Open
7_ list of figures.pdf175.84 kBAdobe PDFView/Open
80_recommendation.pdf6.41 MBAdobe PDFView/Open
8_ list of tables.pdf84.91 kBAdobe PDFView/Open
9_abbrevations.pdf167.34 kBAdobe PDFView/Open
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