Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/37523
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dc.coverage.spatialen_US
dc.date.accessioned2015-03-18T05:20:29Z-
dc.date.available2015-03-18T05:20:29Z-
dc.date.issued2015-03-18-
dc.identifier.urihttp://hdl.handle.net/10603/37523-
dc.description.abstractInterconnection networks INs are the basic building block of all parallel processing systems Multi stage interconnection networks MINs are widely used in many parallel processing applications since it provides excellent performance at minimum cost with high reliability It consists of more than one stage of small interconnection elements called switching elements SEs and links interconnecting them MINs are the important class of INs In this thesis, the author has focused on the efficiency of MINs and done his research in this direction in order to get the highly efficient MIN newlineBasically, efficiency is the level of performance of a system In this research work, the author has considered all the factors of performance that can measure the efficiency of a MIN eg bandwidth, the probability of acceptance, throughput, processor utilization, and processing power Additionally, the efficiency depends on the condition of a MIN It can be faulty or non faulty Faulty situations create the problem for data packets which are to be transmitted from the given source to the given destinations Here the term faulty situations refers to the faulty SEs This problem disturbs the data transmission process and creates a negative impact on the efficiency of the MIN newlineTo avoid this problem the solution is to design a MIN which possesses excellent fault tolerability with good performance Literature survey shows that various MINs have been proposed to overcome this problem, eg modified alpha network MALN, irregular augmented shuffle exchange network IASEN All the previously proposed MINs have less number of alternate paths between the source and destinations have high cost and poor performances newlineen_US
dc.format.extenten_US
dc.languageEnglishen_US
dc.relationen_US
dc.rightsuniversityen_US
dc.titleOn Efficiency of Multi Stage Interconnection Networksen_US
dc.title.alternativeen_US
dc.creator.researcherBhardwaj, Ved Prakashen_US
dc.subject.keywordCrosstalken_US
dc.subject.keywordDestination Based Modified Omega Networken_US
dc.subject.keywordFault Toleranceen_US
dc.subject.keywordIrregular Advance Omega Networken_US
dc.subject.keywordMulti Stage Interconnection Networksen_US
dc.description.noteen_US
dc.contributor.guideNitinen_US
dc.publisher.placeSolanen_US
dc.publisher.universityJaypee University of Information Technology, Solanen_US
dc.publisher.institutionDepartment of Computer Science Engineeringen_US
dc.date.registered20/06/2010en_US
dc.date.completed07/03/2014en_US
dc.date.awarded11/12/2014en_US
dc.format.dimensionsen_US
dc.format.accompanyingmaterialNoneen_US
dc.source.universityUniversityen_US
dc.type.degreePh.D.en_US
Appears in Departments:Department of Computer Science Engineering

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01_title.pdfAttached File74.34 kBAdobe PDFView/Open
02_acknowledgement.pdf131.84 kBAdobe PDFView/Open
03_declaration.pdf123.93 kBAdobe PDFView/Open
04_certificate.pdf133.33 kBAdobe PDFView/Open
05_list of figures & tables.pdf943.65 kBAdobe PDFView/Open
06_contents.pdf443.46 kBAdobe PDFView/Open
07_chapter 1.pdf641.23 kBAdobe PDFView/Open
08_chapter 2.pdf1.8 MBAdobe PDFView/Open
09_chapter 3.pdf2.98 MBAdobe PDFView/Open
10_chapter 4.pdf6.82 MBAdobe PDFView/Open
11_chapter 5.pdf2.43 MBAdobe PDFView/Open
12_chapter 6.pdf226.6 kBAdobe PDFView/Open
13_references.pdf976.27 kBAdobe PDFView/Open


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