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http://hdl.handle.net/10603/37523
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DC Field | Value | Language |
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dc.coverage.spatial | en_US | |
dc.date.accessioned | 2015-03-18T05:20:29Z | - |
dc.date.available | 2015-03-18T05:20:29Z | - |
dc.date.issued | 2015-03-18 | - |
dc.identifier.uri | http://hdl.handle.net/10603/37523 | - |
dc.description.abstract | Interconnection networks INs are the basic building block of all parallel processing systems Multi stage interconnection networks MINs are widely used in many parallel processing applications since it provides excellent performance at minimum cost with high reliability It consists of more than one stage of small interconnection elements called switching elements SEs and links interconnecting them MINs are the important class of INs In this thesis, the author has focused on the efficiency of MINs and done his research in this direction in order to get the highly efficient MIN newlineBasically, efficiency is the level of performance of a system In this research work, the author has considered all the factors of performance that can measure the efficiency of a MIN eg bandwidth, the probability of acceptance, throughput, processor utilization, and processing power Additionally, the efficiency depends on the condition of a MIN It can be faulty or non faulty Faulty situations create the problem for data packets which are to be transmitted from the given source to the given destinations Here the term faulty situations refers to the faulty SEs This problem disturbs the data transmission process and creates a negative impact on the efficiency of the MIN newlineTo avoid this problem the solution is to design a MIN which possesses excellent fault tolerability with good performance Literature survey shows that various MINs have been proposed to overcome this problem, eg modified alpha network MALN, irregular augmented shuffle exchange network IASEN All the previously proposed MINs have less number of alternate paths between the source and destinations have high cost and poor performances newline | en_US |
dc.format.extent | en_US | |
dc.language | English | en_US |
dc.relation | en_US | |
dc.rights | university | en_US |
dc.title | On Efficiency of Multi Stage Interconnection Networks | en_US |
dc.title.alternative | en_US | |
dc.creator.researcher | Bhardwaj, Ved Prakash | en_US |
dc.subject.keyword | Crosstalk | en_US |
dc.subject.keyword | Destination Based Modified Omega Network | en_US |
dc.subject.keyword | Fault Tolerance | en_US |
dc.subject.keyword | Irregular Advance Omega Network | en_US |
dc.subject.keyword | Multi Stage Interconnection Networks | en_US |
dc.description.note | en_US | |
dc.contributor.guide | Nitin | en_US |
dc.publisher.place | Solan | en_US |
dc.publisher.university | Jaypee University of Information Technology, Solan | en_US |
dc.publisher.institution | Department of Computer Science Engineering | en_US |
dc.date.registered | 20/06/2010 | en_US |
dc.date.completed | 07/03/2014 | en_US |
dc.date.awarded | 11/12/2014 | en_US |
dc.format.dimensions | en_US | |
dc.format.accompanyingmaterial | None | en_US |
dc.source.university | University | en_US |
dc.type.degree | Ph.D. | en_US |
Appears in Departments: | Department of Computer Science Engineering |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf | Attached File | 74.34 kB | Adobe PDF | View/Open |
02_acknowledgement.pdf | 131.84 kB | Adobe PDF | View/Open | |
03_declaration.pdf | 123.93 kB | Adobe PDF | View/Open | |
04_certificate.pdf | 133.33 kB | Adobe PDF | View/Open | |
05_list of figures & tables.pdf | 943.65 kB | Adobe PDF | View/Open | |
06_contents.pdf | 443.46 kB | Adobe PDF | View/Open | |
07_chapter 1.pdf | 641.23 kB | Adobe PDF | View/Open | |
08_chapter 2.pdf | 1.8 MB | Adobe PDF | View/Open | |
09_chapter 3.pdf | 2.98 MB | Adobe PDF | View/Open | |
10_chapter 4.pdf | 6.82 MB | Adobe PDF | View/Open | |
11_chapter 5.pdf | 2.43 MB | Adobe PDF | View/Open | |
12_chapter 6.pdf | 226.6 kB | Adobe PDF | View/Open | |
13_references.pdf | 976.27 kB | Adobe PDF | View/Open |
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