Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/372306
Title: Efficient domino logic circuits design with Nano FET technologies
Researcher: Garg, Sandeep
Guide(s): Gupta, Tarun Kumar
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Maulana Azad National Institute of Technology Bhopal
Completed Date: 2019
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/372306
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File185.77 kBAdobe PDFView/Open
02_certificate.pdf163.21 kBAdobe PDFView/Open
03_preliminary pages.pdf498.88 kBAdobe PDFView/Open
04_chapter-1.pdf643.08 kBAdobe PDFView/Open
05_chapter-2.pdf184.89 kBAdobe PDFView/Open
06_chapter-3.pdf422.82 kBAdobe PDFView/Open
07_chapter-4.pdf651.24 kBAdobe PDFView/Open
08_chapter-5.pdf874.51 kBAdobe PDFView/Open
09_chapter-6.pdf703.38 kBAdobe PDFView/Open
10_chapter-7.pdf331.94 kBAdobe PDFView/Open
11_bibliography.pdf303.36 kBAdobe PDFView/Open
80_recommendation.pdf517.34 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: