1. Shodhganga@INFLIBNET
  2. SASTRA University
  3. School of Electrical and Electronics Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/369282
Title: Hardware In Loop Co Simulation of Shunt Active Filter for Harmonic Mitigation and Reactive Power Compensation
Researcher: Sriranjani R
Guide(s): Jayalalitha S
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: SASTRA University
Completed Date: 2020
Abstract: Abstract Included newline
Pagination: xxvi, 219p
URI: http://hdl.handle.net/10603/369282
Appears in Departments:School of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File5.39 kBAdobe PDFView/Open
02_certificate.pdf38.11 kBAdobe PDFView/Open
03_perliminary.pdf286.55 kBAdobe PDFView/Open
04_chapter_01.pdf124.32 kBAdobe PDFView/Open
05_chapter_02.pdf203.99 kBAdobe PDFView/Open
06_chapter_03.pdf448.68 kBAdobe PDFView/Open
07_chapter_04.pdf699.02 kBAdobe PDFView/Open
08_chapter_05.pdf522.94 kBAdobe PDFView/Open
09_chapter_06.pdf564.94 kBAdobe PDFView/Open
10_chapter_07.pdf616.94 kBAdobe PDFView/Open
11_chapter_08.pdf1.49 MBAdobe PDFView/Open
12_chapter_09.pdf557.43 kBAdobe PDFView/Open
13_chapter_10.pdf129.95 kBAdobe PDFView/Open
14_references.pdf119.43 kBAdobe PDFView/Open
15_appendix.pdf969.83 kBAdobe PDFView/Open
80_recommendation.pdf124.27 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: