Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/36772
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dc.coverage.spatialComputer Scienceen_US
dc.date.accessioned2015-03-10T11:50:56Z-
dc.date.available2015-03-10T11:50:56Z-
dc.date.issued2015-03-10-
dc.identifier.urihttp://hdl.handle.net/10603/36772-
dc.description.abstractAbstract avalibleen_US
dc.format.extent189p.en_US
dc.languageEnglishen_US
dc.relation-en_US
dc.rightsuniversityen_US
dc.titleDevelopment of an algorithm using evolutionary approach for digital circuit layout based on graph partitioning techniqueen_US
dc.title.alternative-en_US
dc.creator.researcherKaur, Maninderen_US
dc.subject.keywordalgorithmen_US
dc.subject.keywordapproachen_US
dc.subject.keywordevolutionaryen_US
dc.description.noteBibliography p.167 - 189en_US
dc.contributor.guideSingh, Kawaljeeten_US
dc.publisher.placePatialaen_US
dc.publisher.universityPunjabi Universityen_US
dc.publisher.institutionDepartment of Computer Scienceen_US
dc.date.registeredn.d.en_US
dc.date.completed2013en_US
dc.date.awardedn.d.en_US
dc.format.dimensions-en_US
dc.format.accompanyingmaterialNoneen_US
dc.type.degreePh.D.en_US
dc.source.inflibnetINFLIBNETen_US
Appears in Departments:Department of Computer Science

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01_titel.pdfAttached File103.04 kBAdobe PDFView/Open
02_certificate.pdf165.53 kBAdobe PDFView/Open
03_decelaration.pdf83.7 kBAdobe PDFView/Open
04_aknowledgement.pdf89.89 kBAdobe PDFView/Open
05_abstract.pdf72.34 kBAdobe PDFView/Open
06_teble of contents.pdf162.27 kBAdobe PDFView/Open
07_list of figular.pdf288.71 kBAdobe PDFView/Open
08_list of teble.pdf106.22 kBAdobe PDFView/Open
09_chepter 1.pdf367.83 kBAdobe PDFView/Open
10_chepter 2.pdf439.54 kBAdobe PDFView/Open
11_chepter 3.pdf365.85 kBAdobe PDFView/Open
12_chepter 4.pdf339.19 kBAdobe PDFView/Open
13_chepter 5.pdf4.16 MBAdobe PDFView/Open
14_chepter 6.pdf507.51 kBAdobe PDFView/Open
15_chepter 7.pdf252.73 kBAdobe PDFView/Open
16_chepter 8.pdf481.72 kBAdobe PDFView/Open


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