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http://hdl.handle.net/10603/365565
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DC Field | Value | Language |
---|---|---|
dc.coverage.spatial | Electronics | |
dc.date.accessioned | 2022-02-28T06:35:50Z | - |
dc.date.available | 2022-02-28T06:35:50Z | - |
dc.identifier.uri | http://hdl.handle.net/10603/365565 | - |
dc.description.abstract | newline | |
dc.format.extent | xxiii, 146p. | |
dc.language | English | |
dc.relation | ||
dc.rights | university | |
dc.title | Leakage reduction and aging benefits technique for low power VLSI design | |
dc.title.alternative | ||
dc.creator.researcher | Sreekala, K S | |
dc.subject.keyword | Engineering | |
dc.subject.keyword | Engineering and Technology | |
dc.subject.keyword | Engineering Electrical and Electronic | |
dc.description.note | Bibliography p.125-144, Appendices p.145-146 | |
dc.contributor.guide | Krishnakumar, S | |
dc.publisher.place | Kottayam | |
dc.publisher.university | Mahatma Gandhi University | |
dc.publisher.institution | College of Technology and Applied Sciences, Edappally | |
dc.date.registered | 2013 | |
dc.date.completed | 2019 | |
dc.date.awarded | 2020 | |
dc.format.dimensions | ||
dc.format.accompanyingmaterial | None | |
dc.source.university | University | |
dc.type.degree | Ph.D. | |
Appears in Departments: | College of Technology and Applied Sciences, Edappally |
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