1. Shodhganga@INFLIBNET
  2. Mahatma Gandhi University
  3. College of Technology and Applied Sciences, Edappally
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/365565
Title: Leakage reduction and aging benefits technique for low power VLSI design
Researcher: Sreekala, K S
Guide(s): Krishnakumar, S
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Mahatma Gandhi University
Completed Date: 2019
Abstract: newline
Pagination: xxiii, 146p.
URI: http://hdl.handle.net/10603/365565
Appears in Departments:College of Technology and Applied Sciences, Edappally

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10_list_of_figures.pdfAttached File78.51 kBAdobe PDFView/Open
11_abbreviations.pdf69.35 kBAdobe PDFView/Open
12_chapter1.pdf541.87 kBAdobe PDFView/Open
13_chapter2.pdf306.23 kBAdobe PDFView/Open
14_chapter3.pdf167.05 kBAdobe PDFView/Open
15_chapter4.pdf162.56 kBAdobe PDFView/Open
16_chapter5.pdf433.22 kBAdobe PDFView/Open
17_chapter6.pdf290.87 kBAdobe PDFView/Open
18_chapter7.pdf202.83 kBAdobe PDFView/Open
19_chapter8.pdf387.9 kBAdobe PDFView/Open
1_title.pdf141.56 kBAdobe PDFView/Open
20_bibliography.pdf126.87 kBAdobe PDFView/Open
21_list_of_publications.pdf27.88 kBAdobe PDFView/Open
2_anti plagiarism certificate.pdf374.79 kBAdobe PDFView/Open
3_dedication.pdf48.02 kBAdobe PDFView/Open
4_declaration.pdf33.25 kBAdobe PDFView/Open
5_certificate.pdf121.66 kBAdobe PDFView/Open
6_abstract.pdf76.47 kBAdobe PDFView/Open
7_acknowledgement.pdf71.63 kBAdobe PDFView/Open
80_recommendation.pdf457.14 kBAdobe PDFView/Open
8_contents.pdf73.89 kBAdobe PDFView/Open
9_list_of_tables.pdf50.75 kBAdobe PDFView/Open
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