Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/358355
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2022-01-27T12:11:10Z-
dc.date.available2022-01-27T12:11:10Z-
dc.identifier.urihttp://hdl.handle.net/10603/358355-
dc.description.abstractnewline
dc.format.extentvi, 124p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDevelopment of Test Power and Test Data Volume Reduction Methods in Digital VLSI Circuits
dc.title.alternative
dc.creator.researcherMitra, Sanjoy
dc.subject.keywordComputer Science
dc.subject.keywordComputer Science Software Engineering
dc.subject.keywordEngineering and Technology
dc.description.note
dc.contributor.guideDas, Debaprasad
dc.publisher.placeSilchar
dc.publisher.universityAssam University
dc.publisher.institutionDepartment of Computer Science and Engineering
dc.date.registered2015
dc.date.completed2019
dc.date.awarded2019
dc.format.dimensions
dc.format.accompanyingmaterialCD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Computer Science and Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File66.52 kBAdobe PDFView/Open
02_certificate.pdf58.15 kBAdobe PDFView/Open
03_preliminary pages.pdf954.08 kBAdobe PDFView/Open
04_abstract.pdf241.55 kBAdobe PDFView/Open
05_chapter 1.pdf2.09 MBAdobe PDFView/Open
06_chapter 2.pdf5.26 MBAdobe PDFView/Open
07_chapter 3.pdf5.84 MBAdobe PDFView/Open
08_chapter 4.pdf2.17 MBAdobe PDFView/Open
09_chapter 5.pdf3.75 MBAdobe PDFView/Open
10_chapter 6.pdf219.05 kBAdobe PDFView/Open
11_bibliography.pdf3.48 MBAdobe PDFView/Open
12_annexure i.pdf552.71 kBAdobe PDFView/Open
13_annexure ii.pdf711.61 kBAdobe PDFView/Open
14_annexure iii.pdf2.52 MBAdobe PDFView/Open
80_recommendation.pdf284.81 kBAdobe PDFView/Open


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