Design and simulation of bandgap engineered mosfets

Abstract

An integrated virtual Technology CAD (TCAD) workbench has been used for SiGe-CMOS process and device simulations including mechanical stress analysis for device design and reliability characterization. The work begins with an overview of the band gap engineering involving Si/SiGe material systems for SiGe-CMOS technology scaling. The TCAD framework has been used for the virtual fabrication of strain and band gap engineered heterostructure MOSFETs. Mechanical stress generation (stress mapping) during fabrication of SiGe-CMOS devices has been studied for the first time. Using process simulation (etching), conversion of biaxial strain in SiGe layers into uniaxial strain is demonstrated. Uniaxially strained-SiGe channel FinFETs have been virtually fabricated for possible use in 7N technology node. A comprehensive analysis based on the state-of-the-art bias temperature instability (BTI) model of aging effects on hetero-FETs in SiGe-CMOS process technology has been performed. This dissertation has mainly addressed the hot carrier (HC) and NBTI/PBTI impacts on heterostructure CMOS devices electrical performances. newlineVariability in transistor parameters have been observed since the beginning of the MOS technology, but they are still not fully understood. Bias temperature instability degradation is one of the critical challenges for the semiconductor industry. Especially the thinning of oxide layers in advanced devices has further increased the effects of BTI on the functionality and lifetime of modern devices. BTI affects the overall reliability of nano scaled devices and circuits leading to system failure. Being able to predict BTI degradation is crucial for the development and long term success of novel transistor structures. In this work, we shall present a comprehensive study of BTI aging effects at predictive level for heterostructure MOSFETs in SiGe-CMOS technology. It is shown that time-dependent variability issues are a major source of device variability due to the formation of gate oxide defects at elevated temperature resulting in deviation of device characteristics (e.g., threshold voltage and drain current) and their impacts on reliability. newlineBTI phenomenon is first explained by the reaction-diffusion (R-D) model. But due to inconsistencies with experimental data in predicting the recovery phase of BTI, the atomic trap based model is developed. BTI effects are then described with the help of the nonradiative multiphonon (NMP) four state model, which is capable to explain many effects newlineviii newlinerelated to BTI. The model is based on the exchange of charge carriers with oxide defects. The model is accurate and provides a detailed description of degradation mechanisms. In addition to two stable states, it considers two metastable states as well, which are essential to capture the complex processes involved in BTI. newlineIt is expected that the findings of this thesis will contribute to the understanding of the BTI and HC reliability mechanisms in strain and band gap engineered heterostructure MOSFETs newline