1. Shodhganga@INFLIBNET
  2. National Institute of Technology (NIT), Warangal
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/356943
Title: Area Efficient Reconfigurable Architectures for Sample Rate Conversion in SDR Receivers
Researcher: Agarwal, Ashok
Guide(s): Lakshmi, B.
Keywords: Engineering and Technology
Radio communication standards
Reconfigurable Architectures
Sample Rate Conversion
Software Defined Radio
University: National Institute of Technology (NIT), Warangal
Completed Date: 2019
Abstract: File Attached
Pagination: xix, 133 p.
URI: http://hdl.handle.net/10603/356943
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File43.32 kBAdobe PDFView/Open
02_declaration.pdf23.5 kBAdobe PDFView/Open
03_certificate.pdf32.48 kBAdobe PDFView/Open
04_acknowledgement.pdf24.39 kBAdobe PDFView/Open
05_abstract.pdf29.97 kBAdobe PDFView/Open
06_content.pdf30.72 kBAdobe PDFView/Open
07_list of tables and figures.pdf55.94 kBAdobe PDFView/Open
08_abbreviations.pdf25.19 kBAdobe PDFView/Open
09_chapter 1.pdf52 kBAdobe PDFView/Open
10_chapter 2.pdf624.15 kBAdobe PDFView/Open
11_chapter 3.pdf596.33 kBAdobe PDFView/Open
12_chapter 4.pdf437.71 kBAdobe PDFView/Open
13_chapter 5.pdf262.21 kBAdobe PDFView/Open
14_chapter 6.pdf660.89 kBAdobe PDFView/Open
15_chapter 7.pdf50.7 kBAdobe PDFView/Open
16_bibliography.pdf82.86 kBAdobe PDFView/Open
17_appendix.pdf1.21 MBAdobe PDFView/Open
80_recommendation.pdf79.23 kBAdobe PDFView/Open
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