Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/355612
Title: Development of Efficient Trace Signal Selection Techniques for Post Silicon Validation and Debugging
Researcher: Agalya R
Guide(s): Muthaiah R
Keywords: Computer Science
Computer Science Theory and Methods
Engineering and Technology
Silicon validation and debug
System on chip
Trace Buffer
University: SASTRA University
Completed Date: 2021
Abstract: Abstract Included newline
Pagination: xvi, 125p
URI: http://hdl.handle.net/10603/355612
Appears in Departments:School of Computing

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02_certificate .pdf241.44 kBAdobe PDFView/Open
03_priliminary.pdf255.53 kBAdobe PDFView/Open
04_chapter_01.pdf283.45 kBAdobe PDFView/Open
05_chapter_02.pdf382.34 kBAdobe PDFView/Open
06_chapter_03.pdf316.11 kBAdobe PDFView/Open
07_chapter_04.pdf301.72 kBAdobe PDFView/Open
08_chapter_05.pdf695.21 kBAdobe PDFView/Open
09_chapter_06.pdf31.55 kBAdobe PDFView/Open
10_references.pdf192.47 kBAdobe PDFView/Open
11_appendices.pdf97.62 kBAdobe PDFView/Open
80_recommendation.pdf50.58 kBAdobe PDFView/Open
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