Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/355114
Title: | Architectures for online processing in reconfigurable computing |
Researcher: | GEORGINA RACHEL GEORGE |
Guide(s): | Devanathan, R |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Hindustan University |
Completed Date: | 2018 |
Abstract: | Reconfigurable computing based on FPGAs can be used to compute just right enabling choice of nonstandard operators and newline on standard data types and sizes as required by a particular algorithm. Due to their bit-level granularity as newlineopposed to the word level granularity of processors, FPGAs are suitable platforms for hardware implementations of DSP algorithms and high performance floating-point computations over very large data sets that newlinecharacterize supercomputing applications. Spatial parallelism ensures speed up newlineand hardware pipelining further increases utilization of functional units in every newlineclock cycle. Online arithmetic operators offer advantages of reduction in resource utilization and interconnection complexity besides providing newlinepipelining at digit level. newlineThe proposed work aims at developing algorithms and architectures for newlinemultiple-operand online processing of fixed and floating-point data on FPGAs. newlineThe operators synthesized using the proposed techniques are implemented on newlinethe Virtex 6 (xc6vlx75t-3ff484) FPGA. Analysis of higher radix and parameterized designs that represent a trade-off between throughput, latency, speed of operation and complexity enables the choice of a suitable data format.Architectures for online multiplication of fixed and floating-point numbers are newlinepresented. The proposed multipliers are designed using a technique to serialize newlineparallel multiplication and do not use serial-to parallel conversion or a selection newlinexiii newlinetable as in existing online algorithms, resulting in operators with reduced newlinecomplexity and accurate outputs. Implementations of online squaring, sum of newlinesquares and dot product operators demonstrate the efficiency of specialized newlinenonstandard online operators over parallel and general purpose online operators newlinethrough improvement in clock frequency and reduction in resource utilization. newlineA mathematical framework for a novel adaptation of the parallel shift-and-add newlinemultiplication algorithm |
Pagination: | |
URI: | http://hdl.handle.net/10603/355114 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
15_discussion.pdf | Attached File | 185.19 kB | Adobe PDF | View/Open |
16_summary.pdf | 178.1 kB | Adobe PDF | View/Open | |
18_appendix.pdf | 549.96 kB | Adobe PDF | View/Open | |
19_reference.pdf | 115.81 kB | Adobe PDF | View/Open | |
1_title.pdf | 139.84 kB | Adobe PDF | View/Open | |
2_certificate.pdf | 419.1 kB | Adobe PDF | View/Open | |
3_declaration.pdf | 70.24 kB | Adobe PDF | View/Open | |
6_abstract.pdf | 72.94 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 514.64 kB | Adobe PDF | View/Open | |
8_introduction.pdf | 83.13 kB | Adobe PDF | View/Open |
Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).
Altmetric Badge: