Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/355031
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dc.date.accessioned2022-01-10T12:14:47Z-
dc.date.available2022-01-10T12:14:47Z-
dc.identifier.urihttp://hdl.handle.net/10603/355031-
dc.description.abstractThe advancement of video technology, high resolution and high quality newlinerequirements for a video scene, large amount of video data during storage or newlinetransmission is required. The important roles of applying possible video with newlinehuge data are video coding techniques. In recent development, MPEG-4 AVC newline/ H.264 is the latest video coding standard that has proved way for the other. newlineTo improve the state of coding efficiency of a major technology, the encoding newlinetechnique called CABAC is prescribed, and the standard of artistic video newlinecompression, entropy is being optimized with binary arithmetic. H.264 Video newlineStandards demonstrates the dramatically improvements in the efficiency of bit newlinerate, compression, quality of video and flexibility of errors developed by the newlinevideo team. But this is done at the expense of four times the computational newlinecomplexity due to various new features, when one-fourth pixel motion newlineestimation with different size blocks and multiple contexts, including a newlinedifferential prediction adaptive directional, Context Adaptive Binary newlineArithmetic Coding (CABAC), uncoupling, based on Context Adaptive newlineVariable Length Coding (CAVLC) or adaptive binary arithmetic is processed.
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDevelopment and Implementation of Low Power Methodologies for Video Codec Using FPGA
dc.title.alternative
dc.creator.researcherKarthikeyan, C
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.noteDeblocking filter, FPGA, Loop filter, H.264, Arithmetic Coding. Binarization, CABAC, MVD, Video Codec
dc.contributor.guideRangachar MJS
dc.publisher.placeChennai
dc.publisher.universityHindustan University
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.date.registered2011
dc.date.completed2018
dc.date.awarded2018
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication Engineering

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10_materials.pdfAttached File1.42 MBAdobe PDFView/Open
11_result.pdf1.7 MBAdobe PDFView/Open
12_discussion.pdf393.57 kBAdobe PDFView/Open
13_summary.pdf219.84 kBAdobe PDFView/Open
14_future direction.pdf212.45 kBAdobe PDFView/Open
15_bibliography.pdf295.12 kBAdobe PDFView/Open
1_title.pdf332.55 kBAdobe PDFView/Open
2_certificate.pdf498.08 kBAdobe PDFView/Open
3_declaration.pdf193.33 kBAdobe PDFView/Open
5_table.pdf205.64 kBAdobe PDFView/Open
6_abstract.pdf198.83 kBAdobe PDFView/Open
7_introduction.pdf607.7 kBAdobe PDFView/Open
80_recommendation.pdf974.54 kBAdobe PDFView/Open
8_review.pdf341.17 kBAdobe PDFView/Open
9_ objectives.pdf218.59 kBAdobe PDFView/Open


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