Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/353396
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dc.date.accessioned2021-12-30T09:53:06Z-
dc.date.available2021-12-30T09:53:06Z-
dc.identifier.urihttp://hdl.handle.net/10603/353396-
dc.description.abstractThe future of automotive industry has a major focus on computing innovations such as newlineautonomous driving, connectivity and mobility. With these advancements, electrical and electronic components started exponentially increasing inside the vehicle; integrating hardware and software components of different automotive safety integrity levels. Automotive OEMs and their suppliers are seeking for an innovative and optimized electrical / electronic vehicle architecture to improve vehicle performance, safety, reliability and lower system costs. Parallelizing the legacy sequential applications and consolidating several small heterogeneous computing units to a centralized computing unit are the proposed approaches for optimizing the electrical / electronic vehicle architecture. A major outcome of this research work is to identify the right scheme and algorithm suitable for parallelizing the legacy sequential code and distributing them in multicore platform. Next is to achieve centralized computing platform by virtualizing an automotive state-of-the-art multicore controller, which does not possess any hardware extensions to support virtualization. An automotive state-of-the-art hypervisor is identified and a demonstrator virtualizing two heterogeneous applications is built. Through this demonstrator, various new concepts like start-up of virtualized system, trap-emulation, virtualizing input-output access and interrupt handling are realized. These concepts are validated in terms of performance, data consistency, memory consumption, timeliness to its deadlines and reliability of the system. Compared to the research works done so far, this evaluation is based on a demonstrator newlinewhere both virtualized applications are performing their regular system activities. newlineThere is no master-slave concept in this demonstrator, enabling independent access for newlineeach application to its needed peripheral. newline newline
dc.format.extentx, 118
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleImplementation and evaluation of hypervisor for Automotive heterogeneous hard real time Embedded applications on a multicore platform
dc.title.alternative
dc.creator.researcherArun Kumar Sundar Rajan
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic; automotive industry; Round Robin (RR) Algorithm; MNT; Mathematical Modelling; ALU Arithmetic Logic Unit
dc.description.note
dc.contributor.guideNirmala Devi M
dc.publisher.placeCoimbatore
dc.publisher.universityAmrita Vishwa Vidyapeetham University
dc.publisher.institutionDept. of Electronics and Communication Engineering
dc.date.registered2015
dc.date.completed2021
dc.date.awarded2021
dc.format.dimensions
dc.format.accompanyingmaterialCD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics & Communication Engineering (Amrita School of Engineering)

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01_title.pdfAttached File1.4 MBAdobe PDFView/Open
02_certificate.pdf1.41 MBAdobe PDFView/Open
03_preliminary pages.pdf634.05 kBAdobe PDFView/Open
04_chapter 1.pdf103.99 kBAdobe PDFView/Open
05_chapter 2.pdf540.12 kBAdobe PDFView/Open
06_chapter 3.pdf273.24 kBAdobe PDFView/Open
07_chapter 4.pdf506.68 kBAdobe PDFView/Open
08_chapter 5.pdf403.66 kBAdobe PDFView/Open
09_chapter 6.pdf56.6 kBAdobe PDFView/Open
10_reference.pdf109.74 kBAdobe PDFView/Open
11_publication.pdf73.59 kBAdobe PDFView/Open
80_recommendation.pdf1.46 MBAdobe PDFView/Open


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