Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/352381
Title: Parallel architecture for logic programming
Researcher: Bhattacharya, Alakananda
Guide(s): Konar, Amit and Mandal, Ajit K.
Keywords: Logic Programming
Parallel Architecture
SIMD
University: Jadavpur University
Completed Date: 2002
Abstract: newline
Pagination: 159 p.
URI: http://hdl.handle.net/10603/352381
Appears in Departments:Department of Electronics and Tele-Communication Engineering

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01_title page.pdfAttached File24.17 kBAdobe PDFView/Open
02_certificate.pdf33 kBAdobe PDFView/Open
03_list of publication.pdf44.95 kBAdobe PDFView/Open
04_preface.pdf298.11 kBAdobe PDFView/Open
05_contents.pdf91.82 kBAdobe PDFView/Open
06_chapter 1.pdf2.82 MBAdobe PDFView/Open
07_chapter 2.pdf1.07 MBAdobe PDFView/Open
08_chapter 3.pdf2.29 MBAdobe PDFView/Open
09_chapter 4.pdf1.04 MBAdobe PDFView/Open
10_chapter 5.pdf233.57 kBAdobe PDFView/Open
11_appendix.pdf261.04 kBAdobe PDFView/Open
80_recommendation.pdf24.17 kBAdobe PDFView/Open
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