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http://hdl.handle.net/10603/347821
Title: | Numerical Simulations and Analysis of Heterojunction Tunnel Field Effect Transistor for Low Power and HighSpeed Applications |
Researcher: | Minaxi Dassi |
Guide(s): | Sharma, Rajnish and Madan, Jaya |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Chitkara University, Punjab |
Completed Date: | 2021 |
Abstract: | Tunnel Field Effect Transistors (TFETs) have proved themselves as a better choice for the replacement of MOSFETs due to provision of scalability and possibility of better realization of goal to achieve subthreshold swing (SS) less than 60mV/decade. However, certain constraints are required to be resolved so as to improve the performance of TFET in terms of higher ON current (ION) and lower threshold voltage (Vth). In this thesis, performance of TFET has been studied and efforts have been made to overcome these major challenges. newlineTo achieve the set of objectives, source material engineering (SME) scheme has been implemented to form a staggered type II heterojunction at the source channel junction by replacing the source material of a conventional TFET by a relatively low band gap material. That way, magnesium silicide/silicon (Mg2Si/Si) heterojunction is formed at the source channel interface of a double gate (DG) TFET. MSH-DG-TFET is proposed and all the simulation results obtained for the proposed device are compared with conventional silicon source DG-TFET (SS-DG-TFET). Silvaco Atlas TCAD simulator has been used to perform all the simulations. To authenticate the work done, all the models implemented during simulation, especially nonlocal band to band tunneling model (i.e., most important model for TFET) is calibrated with already reported experimental work. It is analyzed that the proposed MSH-DG-TFET displayed superior performance by achieving higher ION, reduced Vth and steeper SS as compared to SS-DG-TFET. MSH-DG-TFET obtained ION of 2.5 x 10-4 A/and#956;m, Vth of 0.26 V and SS of 10.05 mV/decade while SS-DG-TFET obtained ION of 1.5 x 10-6 A/and#956;m, Vth of 1.15 V and SS of 19.85 mV/decade. Thus, the performance parameters especially lower Vth and reduced SS achieved by the proposed device MSH-DG-TFET makes it eligible for low power and high performance analog applications. newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/347821 |
Appears in Departments: | Faculty of Electronics |
Files in This Item:
File | Description | Size | Format | |
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80_recommendation.pdf | Attached File | 115.51 kB | Adobe PDF | View/Open |
certificate.pdf | 129.6 kB | Adobe PDF | View/Open | |
chapter _1.pdf | 1.01 MB | Adobe PDF | View/Open | |
chapter_2.pdf | 1.56 MB | Adobe PDF | View/Open | |
chapter_3.pdf | 828.64 kB | Adobe PDF | View/Open | |
chapter_4.pdf | 3.19 MB | Adobe PDF | View/Open | |
chapter_5.pdf | 1.13 MB | Adobe PDF | View/Open | |
chapter_6.pdf | 1.3 MB | Adobe PDF | View/Open | |
chapter_7.pdf | 108.65 kB | Adobe PDF | View/Open | |
preliminary pages .pdf | 266.7 kB | Adobe PDF | View/Open | |
title.pdf | 13.51 kB | Adobe PDF | View/Open |
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