Optimized pulse width modulation for single dc source multilevel inverter based on witched capacitor topology

Abstract

Industries based on power electronic devices possess always great interest in the research and development of Multi Level Inverter (MLI) because of their major role in driving medium voltage and high-power applications. Since the MLIs are used in many applications, the research on this topic still continues. Many types of MLIs have been proposed to generate multiple numbers of levels in the output voltage. The major drawbacks behind these are the size, requirement of switches, number of DC sources and Pulse Width Modulation (PWM) techniques.In the present research work, multilevel voltage pattern has been obtained with the introduction of Switched Capacitor (SC) unit. For generating seven level inverter voltage, seven switches and two SC units are required. Another significant contribution is that it requires single DC source. The DC source should be equal to the maximum voltage of the output. From this point, it is observed that the less voltage values in the output at lower level can be obtained from the charged voltage of the capacitor. In high switching frequency technique, the Multi-Carrier Pulse Width Modulation (MC-PWM) has been used for giving control signals to the power electronic switches. The behaviour of the multilevel inverter has been validated for seven levels. The results show that the multilevel inverter can be effectively generated with multilevel pattern with reduced harmonic content. Harmonics are reduced by 46.819% compared to conventional Cascaded H-Bridge MLI (CHB-MLI). newline