Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/342842
Title: Investigation of low power radiation aware transistor level design in cmos circuits
Researcher: Kamalakannan, R S
Guide(s): Venkatachalam, K
Keywords: Engineering and Technology
Engineering
Engineering Electrical and Electronic
CMOS circuits
Low power radiation
VLSI design
University: Anna University
Completed Date: 2020
Abstract: CMOS logic based circuit is generally used in high speed VLSI design. The main challenge of CMOS in logic based circuit is power consumption. This is major problem in deep submicron CMOS. The Leakage current is main difficult in CMOS. It causes because of scaling and supply-threshold voltage, leakage power is become more important in power dissipation of CMOS Circuits. The main aim is to achieve higher density, higher performance and lesser power consumption. To reduce this issue we need to develop new circuit techniques and design through that have to control leakage current in standby to display results in low-power solutions. The standby power is reduced based on the temperature and process a condition, the optimal supply voltages is executed to decreases the power leakage and processes it to control the PVT variations. The first stage of research is focuses on INDEP transistor level based low leakage approach of CMOS. The INDEP is based on Boolean logic for the input signals of the CMOS logic. INDEP is useful not only for reducing leakage current but also for minimizing delay paths. INDEP has capability to work in both active and standby mode of the CMOS logic circuits. The proposed methodologies uses INDEP based FAs with existing Schmitt trigger based FAs. Input dependent design is transistor level technique and it is not only aware of PVT variability issues but also reduces the leakage current. Input dependent method is assigned to different CMOS PTM model. The simulation result uses the HSPICE tool to analyze FAs based INDEP design. The performances carried out by different parameters such as power, delay, power delay product, supply voltage, temperature and leakage current.The second stage of research is focuses on Low Power Radiation Aware (LPRA) circuit design. The most important radiation effects are Total Ionization Dose (TID) and Single Event Effects (SEE). First, we use the physics based modeling approach for compute radiation response of each component in the circuit. Tri-state inverter embedded no
Pagination: xix,157 p.
URI: http://hdl.handle.net/10603/342842
Appears in Departments:Faculty of Information and Communication Engineering

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13_chapter3.pdf604.91 kBAdobe PDFView/Open
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15_chapter5.pdf491.12 kBAdobe PDFView/Open
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18_listofpublications.pdf85.56 kBAdobe PDFView/Open
80_recommendation.pdf48.78 kBAdobe PDFView/Open
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