Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/340979
Title: Quantum Transport In Nanostructures
Researcher: Sangeeta Mangesh Karyakarte
Guide(s): P. K. Chopra K.K. Saini
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Dr. A.P.J. Abdul Kalam Technical University
Completed Date: 2021
Abstract: With device scaling, the nanoscale channel length becomes comparable newlineto the photonic wavelength, and electron confinement near Silicon-Silicon dioxide newlineinterface demands the inclusion of quantum effect in modeling charge newlinetransport. FinFET being the most promising device structure that has newlinesurpassed the scaling challenges, reducing pitch dimensions, and optimizing newlineboth power and performance metrics, has been the obvious choice of this newlineresearch aimed at studying the quantum transport in nanostructures. To meet newlinethe challenges of the era of the Internet of Things (IOT) and (Internet of newlineEverything) IET, the research is aimed to project an innovative device design newlineoptimized for low-power RF analog and digital VLSI design. newlineThis research focuses on projecting enhanced performance metrics newlineanalyzed using charge transport through quantum corrected drift-diffusion newlinemodeling for different nanoscale FinFET devices. At the first stage, power newlineand performance metrics for a 22 nm SOI device have been examined for newlineoperational reliability. In the second phase, the bulk FinFET is evaluated for newlineall possible fin structure variations and low power digital design feasibility. newlineA spacer FinFET is then analyzed for impact on the recombination process at newlineelevated temperatures. newlineThe outcome of this research is a design of the new FinFET proposed. newlineThe new FinFET device having trapezoidal cross-section, staked gate newlinestructure with gate extension is evaluated using quantum charge transport newlinemodeling. The proposed device has been optimized by examining its newlinecharacteristics for fin height variations, metal work function variations, and newlinegate extension variations. The most optimized design of the new FinFET has newlinebeen compared with trapezoidal and trapezoidal with gate stacking newlinearchitectures. The improved gate control of this device is justified through newlinescrutiny of different performance metrics such as transconductance (and#119892;and#119898;), newlinedrain resistance (and#119903;and#119889;), transconductance generation factor (TGF), Leakage newlinefigure of merit (FOM), sub-threshold slope (SS), gate ind
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URI: http://hdl.handle.net/10603/340979
Appears in Departments:dean PG Studies and Research

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chapter 1.pdf601.31 kBAdobe PDFView/Open
chapter 2.pdf2.39 MBAdobe PDFView/Open
chapter 3.pdf533.83 kBAdobe PDFView/Open
chapter 4.pdf1.3 MBAdobe PDFView/Open
chapter 5.pdf506.23 kBAdobe PDFView/Open
chapter 6.pdf1.06 MBAdobe PDFView/Open
chapter 7.pdf223.29 kBAdobe PDFView/Open
preliminary pages.pdf373.58 kBAdobe PDFView/Open
title.pdf136.35 kBAdobe PDFView/Open
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