Fpga design of image denoising filters for image enhancement applications

Abstract

In the process of image acquisition and transmission, image can be corrupted by various noises. Removing noise from the original image is still a challenging job for researchers. Image denoising technique is used to improve the visual appearance of the image and to extract the fine details in the corrupted image. The purpose of image restoration is to process an image whereby the resulting output image will be clearer than the original image. The field of image processing is vast. The image filtering is one of the areas in Image processing. The problem of removing the noise of an image while preserving its main features (edges, textures and contrast) has been extensively investigated over the last two decades and several types of approaches have been developed. A significant conventional image de-noising model is utilized to evacuate commotion while protecting the edges. This research presents the results of some significant work in the area of image denoising. It explores denoising of images using some existing methods such as SEPD (Simple Edge Preserved De-noising) technique and RSEPD (Reduced Simple Edge Preserved De-noising) technique. To obtain significant results various filters have been proposed. The filters which are most suitable for denoising are Edge Oriented Noise Filter in Low Cost Reduced Simple Edge Preserved De-noising (LCRSEPD) technique and FPGA Implementation of Multiresolution Flexible Averaging Filter (FAF). This research presents the removal of impulse noise in digital images by using Very Large-Scale Integrated circuit (VLSI) implementation. The Low Cost Reduced Simple Edge Preserved De-noising (LCRSEPD) technique is proposed using Low Area Carry Select Adder (CSLA) to remove the salt and pepper noise instead of normal adder. Thus, LCRSEPD technique preserves visual performance and edge features in terms of qualitative and quantitative evaluation. By optimizing the architecture, low cost RSEPD can achieve low computational complexity that will reflect in area, power and delay. Compared to