Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/334182
Title: Certain investigations on improved hardware security constraints using logic obfuscation technique
Researcher: Baluprithviraj, K N
Guide(s): Vijayachitra, S
Keywords: Hardware security
Security of Integrated Circuits
Reverse Engineering
University: Anna University
Completed Date: 2020
Abstract: Hardware security has become an important topic for more researchers from related research domains joining in this field recently. Security of Integrated Circuits (ICs) has emerged as a significant concern at completely different level of IC life cycle, spanning design, test, fabrication and deployment. Recently developed ICs are becoming increasingly newlinevulnerable to various forms of security threats such as 1) illegal use of hardware Intellectual Property (IP) or IP Piracy , 2) illegal manufacturing of IC or IC Piracy , 3) insertion of malicious circuits, referred to as Hardware Trojan , in a design to cause in field circuit malfunction and 4) leakage of secret information from an IC. The economics of electronic manufacturing dictates widespread outsourcing of IC fabrication to off shore facilities, which increases the vulnerability to hardware attacks. In the present research, Novel hardware design approaches that incorporate a key based design obfuscation scheme to effectively protect a design against various security threats, while incurring low hardware and computational overheads are explored. Obfuscation is a technique that makes comprehending and Reverse Engineering (RE) a design difficult task. The effectiveness of the obfuscation based approaches for protection against IP reverse-engineering and piracy, hardware Trojan and information leakage is evaluated with benchmark circuits. Logic locking is a technique that has received significant attention. It has been effectively utilized for ensuring the function of digital circuits against IC theft. It protects a hardware design netlist from a variety of hardware security threats such as tampering, reverse engineering, and piracy, stemming from untrusted chip foundry and end-users. newline newline
Pagination: xx,139p.
URI: http://hdl.handle.net/10603/334182
Appears in Departments:Faculty of Information and Communication Engineering

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02_certificates.pdf115.63 kBAdobe PDFView/Open
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04_vivaproceedings.pdf201.48 kBAdobe PDFView/Open
05_abstracts.pdf183.91 kBAdobe PDFView/Open
06_acknowledgements.pdf468.6 kBAdobe PDFView/Open
07_contents.pdf387.08 kBAdobe PDFView/Open
08_listoftables.pdf350.51 kBAdobe PDFView/Open
09_listoffigures.pdf361.03 kBAdobe PDFView/Open
10_listofabbreviations.pdf52.67 kBAdobe PDFView/Open
11_chapter1.pdf1.1 MBAdobe PDFView/Open
12_chapter2.pdf427.19 kBAdobe PDFView/Open
13_chapter3.pdf954.77 kBAdobe PDFView/Open
14_chapter4.pdf1.14 MBAdobe PDFView/Open
15_chapter5.pdf796.82 kBAdobe PDFView/Open
16_conclusion.pdf262.26 kBAdobe PDFView/Open
17_references.pdf1.54 MBAdobe PDFView/Open
18_listofpublications.pdf255 kBAdobe PDFView/Open
80_recommendation.pdf123.28 kBAdobe PDFView/Open
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