Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/332981
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dc.date.accessioned2021-07-22T03:09:57Z-
dc.date.available2021-07-22T03:09:57Z-
dc.identifier.urihttp://hdl.handle.net/10603/332981-
dc.description.abstract Interconnection networks are used to connect processor and memory modules in a parallel processing system. It is considered as the backbone of parallel system which is responsible for efficient communication in a network environment. The overall performance of parallel system is highly depended upon efficient communication among different processing elements and memory modules. The overall utility of an interconnection network depends upon its fault- tolerance capability. Besides different topological parameters like node degree, network diameter, bisection width, packing density, the network cost can also account for a sizeable amount of the overall system cost in large systems. So, it is quite essential to design cost efficient fault-tolerant interconnection networks suitable for parallel processing systems. The thesis contains seven chapters. The 1st Chapter is introductory in nature which provides a brief introduction to interconnection network including motivation and objective of research. The Chapter 2 is devoted for an exhaustive study of literature. In recent years, the Hierarchical Interconnection Networks (HIN) have attracted many researchers because they provide a platform to design networks with reduced link cost. The relative merits and demerits of various hierarchical interconnection networks have been studied and a new interconnection network called the Hierarchical Hexagon is proposed in Chapter 3. It has been shown that the proposed network is superior to many existing topologies with respect to the node degree, diameter, cost, packing density, and fault tolerance. The fault- tolerant routing under various situations is proposed in this research. The presence of Hamiltonian cycle in the proposed network is also discussed. The performance comparison of the proposed network has been done
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleStudies On Some Fault Tolerant Interconnection Networks For Parallel Systems
dc.title.alternative
dc.creator.researcherTripathy, Laxminath
dc.subject.keywordComputer Science
dc.subject.keywordComputer Science Interdisciplinary Applications
dc.subject.keywordEngineering and Technology
dc.description.note
dc.contributor.guideTripathy, C.R.
dc.publisher.placeSambalpur
dc.publisher.universityVeer Surendra Sai University of Technology
dc.publisher.institutionDepartment of Computer Science and Engineering and IT
dc.date.registered
dc.date.completed2019
dc.date.awarded
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Computer Science and Engineering and IT

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01_title.pdfAttached File97.32 kBAdobe PDFView/Open
02_certificates.pdf82.28 kBAdobe PDFView/Open
04_contents.pdf25.71 kBAdobe PDFView/Open
05_preface.pdf.pdf86.86 kBAdobe PDFView/Open
06_list of tables figures.pdf90.39 kBAdobe PDFView/Open
07_chapter 1.pdf370.43 kBAdobe PDFView/Open
08_chapter 2.pdf419.04 kBAdobe PDFView/Open
09_chapter 3.pdf704.86 kBAdobe PDFView/Open
10_chapter 4.pdf773.99 kBAdobe PDFView/Open
11 chapter 5.pdf346.98 kBAdobe PDFView/Open
12_chapter 6.pdf411.13 kBAdobe PDFView/Open
13_chapter 7.pdf141.92 kBAdobe PDFView/Open
80_recommendation.pdf236.11 kBAdobe PDFView/Open
abstract-converted.pdf84.84 kBAdobe PDFView/Open


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