1. Shodhganga@INFLIBNET
  2. GITAM University
  3. School of Technology Hyderabad Campus
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/330086
Title: Implementation of Built In Self Test Using Low Power Test Pattern Generators in Test Per Clock Scheme
Researcher: Jamal.Kovelakuntla
Guide(s): Manjunatha Chari.K
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: GITAM University
Completed Date: 2021
Abstract: File Attached newline
Pagination: 
URI: http://hdl.handle.net/10603/330086
Appears in Departments:School of Technology Hyderabad Campus

Files in This Item:
File Description SizeFormat 
10_chapter i.pdfAttached File368.52 kBAdobe PDFView/Open
11_chapter-ii.pdf598.83 kBAdobe PDFView/Open
12_chapter-iii.pdf1.05 MBAdobe PDFView/Open
13_chapter-iv.pdf592.18 kBAdobe PDFView/Open
14_chapter v.pdf893.3 kBAdobe PDFView/Open
15_chapter vi.pdf440.6 kBAdobe PDFView/Open
16_references.pdf492.52 kBAdobe PDFView/Open
17_list of publications.pdf345.71 kBAdobe PDFView/Open
1_title.pdf301.16 kBAdobe PDFView/Open
2_certificate.pdf209.15 kBAdobe PDFView/Open
3_abstract.pdf361.52 kBAdobe PDFView/Open
4_declaration.pdf184.79 kBAdobe PDFView/Open
5_acknowledgement.pdf187.81 kBAdobe PDFView/Open
6_table of contents.pdf383.51 kBAdobe PDFView/Open
7_list of tables.pdf359.18 kBAdobe PDFView/Open
80_recommendation.pdf368.52 kBAdobe PDFView/Open
8_list of figures.pdf350.26 kBAdobe PDFView/Open
9_abbreviations.pdf350.46 kBAdobe PDFView/Open
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