Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/324559
Full metadata record
DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2021-05-06T06:00:50Z-
dc.date.available2021-05-06T06:00:50Z-
dc.identifier.urihttp://hdl.handle.net/10603/324559-
dc.format.extent147 p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleSecured Network Elements Framework for NoC based Multiprocessing System on Chip on FPGA
dc.title.alternative
dc.creator.researcherGuruprasad S P
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideChandrashekar B S
dc.publisher.placeBengaluru
dc.publisher.universityJain University
dc.publisher.institutionDept. of Electronics Engineering
dc.date.registered2018
dc.date.completed2020
dc.date.awarded2021
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Dept. of Electronics Engineering

Files in This Item:
File Description SizeFormat 
80_recommendation.pdfAttached File238.21 kBAdobe PDFView/Open
certificate.pdf186.43 kBAdobe PDFView/Open
chapter 1.pdf627.18 kBAdobe PDFView/Open
chapter 2.pdf319.47 kBAdobe PDFView/Open
chapter 3.pdf553.48 kBAdobe PDFView/Open
chapter 4.pdf396.24 kBAdobe PDFView/Open
chapter 5.pdf353.4 kBAdobe PDFView/Open
chapter 6.pdf465.9 kBAdobe PDFView/Open
chapter 7.pdf751.78 kBAdobe PDFView/Open
chapter 8.pdf228.49 kBAdobe PDFView/Open
cover_page.pdf91.73 kBAdobe PDFView/Open
table_of_contents.pdf216.08 kBAdobe PDFView/Open


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: