Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/324559
Title: | Secured Network Elements Framework for NoC based Multiprocessing System on Chip on FPGA |
Researcher: | Guruprasad S P |
Guide(s): | Chandrashekar B S |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Jain University |
Completed Date: | 2020 |
Pagination: | 147 p. |
URI: | http://hdl.handle.net/10603/324559 |
Appears in Departments: | Dept. of Electronics Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
80_recommendation.pdf | Attached File | 238.21 kB | Adobe PDF | View/Open |
certificate.pdf | 186.43 kB | Adobe PDF | View/Open | |
chapter 1.pdf | 627.18 kB | Adobe PDF | View/Open | |
chapter 2.pdf | 319.47 kB | Adobe PDF | View/Open | |
chapter 3.pdf | 553.48 kB | Adobe PDF | View/Open | |
chapter 4.pdf | 396.24 kB | Adobe PDF | View/Open | |
chapter 5.pdf | 353.4 kB | Adobe PDF | View/Open | |
chapter 6.pdf | 465.9 kB | Adobe PDF | View/Open | |
chapter 7.pdf | 751.78 kB | Adobe PDF | View/Open | |
chapter 8.pdf | 228.49 kB | Adobe PDF | View/Open | |
cover_page.pdf | 91.73 kB | Adobe PDF | View/Open | |
table_of_contents.pdf | 216.08 kB | Adobe PDF | View/Open |
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