Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/324559
Title: Secured Network Elements Framework for NoC based Multiprocessing System on Chip on FPGA
Researcher: Guruprasad S P
Guide(s): Chandrashekar B S
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Jain University
Completed Date: 2020
Pagination: 147 p.
URI: http://hdl.handle.net/10603/324559
Appears in Departments:Dept. of Electronics Engineering

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80_recommendation.pdfAttached File238.21 kBAdobe PDFView/Open
certificate.pdf186.43 kBAdobe PDFView/Open
chapter 1.pdf627.18 kBAdobe PDFView/Open
chapter 2.pdf319.47 kBAdobe PDFView/Open
chapter 3.pdf553.48 kBAdobe PDFView/Open
chapter 4.pdf396.24 kBAdobe PDFView/Open
chapter 5.pdf353.4 kBAdobe PDFView/Open
chapter 6.pdf465.9 kBAdobe PDFView/Open
chapter 7.pdf751.78 kBAdobe PDFView/Open
chapter 8.pdf228.49 kBAdobe PDFView/Open
cover_page.pdf91.73 kBAdobe PDFView/Open
table_of_contents.pdf216.08 kBAdobe PDFView/Open
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