1. Shodhganga@INFLIBNET
  2. University of Delhi
  3. Faculty of Technology
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/31644
Title: Signal processing and generating circuits using otra as a building block
Researcher: Pandey, Rajeshwari
Guide(s): Pandey, Neeta and Paul Sajal K
Keywords: building block
generating circuits
Signal processing
Upload Date: 23-Dec-2014
University: University of Delhi
Completed Date: 2013
Abstract: Available
Pagination: 225p.
URI: http://hdl.handle.net/10603/31644
Appears in Departments:Faculty of Technology

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01_title.pdfAttached File50.42 kBAdobe PDFView/Open
02_certificate.pdf28.2 kBAdobe PDFView/Open
03_acknowledgement.pdf31.95 kBAdobe PDFView/Open
04_abstract.pdf34.08 kBAdobe PDFView/Open
05_contents.pdf52.13 kBAdobe PDFView/Open
06_list of figures, tables, publications.pdf124.15 kBAdobe PDFView/Open
07_abstract.pdf29.42 kBAdobe PDFView/Open
08_chapter 1.pdf98.38 kBAdobe PDFView/Open
09_chapter 2.pdf253.86 kBAdobe PDFView/Open
10_chapter 3.pdf683.07 kBAdobe PDFView/Open
11_chapter 4.pdf915.93 kBAdobe PDFView/Open
12_chapter 5.pdf541.62 kBAdobe PDFView/Open
13_chapter 6.pdf502.13 kBAdobe PDFView/Open
14_chapter 7.pdf719.86 kBAdobe PDFView/Open
15_chapter 8.pdf85.66 kBAdobe PDFView/Open
16_refrences.pdf74.25 kBAdobe PDFView/Open
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