Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/314490
Title: Scalable and low power network on chip design for reconfigurable systems
Researcher: Mittal, Himani
Guide(s): Kumar, Yogendera
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Galgotias University
Completed Date: 2017
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/314490
Appears in Departments:School of Electrical, Electronics & Communication Engineering

Files in This Item:
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01_title.pdfAttached File217.33 kBAdobe PDFView/Open
02_declaration and certificate.pdf109.67 kBAdobe PDFView/Open
03_acknowledgement.pdf9.67 kBAdobe PDFView/Open
04_abstract.pdf190.52 kBAdobe PDFView/Open
05_list of contents.pdf185.75 kBAdobe PDFView/Open
06_list of tables.pdf8.62 kBAdobe PDFView/Open
07_list of figures.pdf17.94 kBAdobe PDFView/Open
08_list of abbreviations.pdf184.04 kBAdobe PDFView/Open
09_list of publications.pdf10.93 kBAdobe PDFView/Open
10_chapter1.pdf347.61 kBAdobe PDFView/Open
11_chapter2.pdf197.34 kBAdobe PDFView/Open
12_chapter3.pdf636.89 kBAdobe PDFView/Open
13_chapter4.pdf4.12 MBAdobe PDFView/Open
14_chapter5.pdf955.68 kBAdobe PDFView/Open
15_chapter6.pdf170.2 kBAdobe PDFView/Open
16_ references.pdf461.42 kBAdobe PDFView/Open
80_recommendation.pdf349.92 kBAdobe PDFView/Open
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