Low Power Coding And Error Control Schemes For Efficient Realization Of Network On Chip

Abstract

Due to rapid advancements in VLSI era, as per Moore s law single chip is incorporated with numerous cores. This results in an environment where System-on-Chip has to handle traffic between different data elements like audio, video, numeric text etc. Irrespective of the applications faster rate of communication was expected in these multi core architectures. When parallel communication was employed in the network buses were not effective to fulfill the requirement of important network parameters such as consumption of power, bandwidth and latency. To achieve this Network-on Chip emerged as an actual substitution for traditional bus based network. Network-on-Chip possesses many attractive features such as architecture scalability, efficient multiplexing techniques, and modularity in their designs. Designs based on NOC effectively render fast, efficient and secured communication between the various elements present in the system. In a typical NOC shared wires were used for communicating data units which in turn sources a considerable amount of reduction in the number of wires. Link is the primary element in Networkon-chip, which establishes the connection between the various blocks, the second element is the router which is involved in protocol communication and the third element is network interface which forms logical connection among the cores and the network. To achieve optimization in NOC based systems, reliability, power consumption and performance should be achieved. Among these three vital parameters power consumption is considered more important due to the integration of numerous core elements in a single chip. Interconnects play a vital role in power contribution in Multi-processor System-on-Chip environment. Dissipation of power is comparatively more at links than by the routers and network interfaces. Though different techniques are available to reduce the power in the links encoding methods are very effective to reduce dynamic power consumption. Before transmission the data are encoded to reduce transitions that occur during switching and at the receiver end decoding is applied to recover the original data. Performance of a system is enhanced by employing optimal code. High throughput is expected in data communication. To eradicate the errors that occur at the Network-on-Chip connections Error Correcting Codes (ECC) gain more importance in recent era. To achieve the reliability in multi core systems suitable error detection and correction methods have to be incorporated .The methods to control error are located at end to end level or at the intermediate interface level. Coding techniques help to enhance the efficiency of the system when they are framed on the basis of the system s application. Consistency of the system is achieved by adapting appropriate error control methods based on specific applications to achieve the various Quality of Service parameters. newline newline newline newline