1. Shodhganga@INFLIBNET
  2. Savitribai Phule Pune University
  3. Sinhgad College of Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/307771
Title: Reduction of peak power and bit error rate in MIMO of DM system using scrambling technique
Researcher: Kota Prabhakar Narasappa
Guide(s): Gaikwad Arun N
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
Scrambling systems (Telecommunication)
Telecommunication
University: Savitribai Phule Pune University
Completed Date: 2016
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/307771
Appears in Departments:Sinhgad College of Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File135.25 kBAdobe PDFView/Open
02_certificates.pdf219.52 kBAdobe PDFView/Open
03_declaration.pdf1.77 MBAdobe PDFView/Open
04_acknowledgements.pdf134.7 kBAdobe PDFView/Open
05_contents.pdf577.26 kBAdobe PDFView/Open
06_list_of_figures.pdf354.6 kBAdobe PDFView/Open
07_list_of_tables.pdf128.88 kBAdobe PDFView/Open
08_abstract.pdf184.7 kBAdobe PDFView/Open
09_chapter 1.pdf257.94 kBAdobe PDFView/Open
10_chapter 2.pdf555.25 kBAdobe PDFView/Open
11_chapter 3.pdf2.1 MBAdobe PDFView/Open
12_chapter 4.pdf1.04 MBAdobe PDFView/Open
13_chapter 5.pdf1.18 MBAdobe PDFView/Open
14_chapter 6.pdf139.35 kBAdobe PDFView/Open
15_references.pdf198.84 kBAdobe PDFView/Open
80_recommendation.pdf272.23 kBAdobe PDFView/Open
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