Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/307771
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dc.coverage.spatial
dc.date.accessioned2020-12-02T12:03:45Z-
dc.date.available2020-12-02T12:03:45Z-
dc.identifier.urihttp://hdl.handle.net/10603/307771-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleReduction of peak power and bit error rate in MIMO of DM system using scrambling technique
dc.title.alternative
dc.creator.researcherKota Prabhakar Narasappa
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.subject.keywordScrambling systems (Telecommunication)
dc.subject.keywordTelecommunication
dc.description.note
dc.contributor.guideGaikwad Arun N
dc.publisher.placePune
dc.publisher.universitySavitribai Phule Pune University
dc.publisher.institutionSinhgad College of Engineering
dc.date.registered2011
dc.date.completed2016
dc.date.awarded2018
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Sinhgad College of Engineering

Files in This Item:
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01_title.pdfAttached File135.25 kBAdobe PDFView/Open
02_certificates.pdf219.52 kBAdobe PDFView/Open
03_declaration.pdf1.77 MBAdobe PDFView/Open
04_acknowledgements.pdf134.7 kBAdobe PDFView/Open
05_contents.pdf577.26 kBAdobe PDFView/Open
06_list_of_figures.pdf354.6 kBAdobe PDFView/Open
07_list_of_tables.pdf128.88 kBAdobe PDFView/Open
08_abstract.pdf184.7 kBAdobe PDFView/Open
09_chapter 1.pdf257.94 kBAdobe PDFView/Open
10_chapter 2.pdf555.25 kBAdobe PDFView/Open
11_chapter 3.pdf2.1 MBAdobe PDFView/Open
12_chapter 4.pdf1.04 MBAdobe PDFView/Open
13_chapter 5.pdf1.18 MBAdobe PDFView/Open
14_chapter 6.pdf139.35 kBAdobe PDFView/Open
15_references.pdf198.84 kBAdobe PDFView/Open
80_recommendation.pdf272.23 kBAdobe PDFView/Open


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