Modeling Analysis of 3d Narrow Channel Fully Depleted Siliconon Insulator Mosfet

Abstract

Now a days, the continuous growth in VLSI Technology is focused completely newlinetowards system miniaturization. The MOS devices are the basic element in any VLSI newlinesystem. Thus miniaturization of devices is needed and dependent on CMOS newlinetechnology development. The minimum physical dimension of single device for newlinepresent day is below sub-50 nm in channel length. As the device dimension is scaled newlinedown continuously and reaching to the limits the performance of the device newlinedegrades. This leads the development of new models and advance version of device newlinecame in existence due to Gate engineering, Material engineering and structural newlineengineering. To full fill the raised requirements of upcoming silicon technology the newlinealternate technology developed named as Silicon On Insulator Technology newline