Implementation of novel low power VLIW DSP architecture

Abstract

Technology has seen the development of processor industry right newlinefrom micro to the latest Nano technology With Speed and performance newlinebeing important criteria not much attention has been given to the power newlinerequirement for these integrated circuits With gaining popularity in newlineapplication specific instruction set processor ASIP developing ASIP newlineprocessors has gained popularity since these processors possess unique newlineproperties like low power consumption and dissipation There are two newlinetechniques adopted for the low power design namely altering the voltage of newlinethe processor and the other one is designing the processor in asynchronous newlineway to further reduce the power and clock skew problem newlineA small but growing number of processors have the ability to newlinedynamically change the CPU voltage level without rebooting and this is newlineknown as dynamic voltage scaling DVS there by consuming less power and newlineless energy newline newline