Investigations on low power 120nm CMOS transceivers for wireless sensor nodes

Abstract

Wireless sensor network WSN is one of the emerging fields which offers a rich multi disciplinary area for research in which a variety of tools and concepts can be employed to address a diverse set of applications One of the major challenges in constructing such networks is to maintain a long network lifetime To achieve this goal low power research is concentrated in the wireless sensor networks WSN consists of many distributed and disposable sensor nodes that require a highly integrated low cost single chip transceiver with high energy efficiency In micro sensor nodes the transceiver dominates the power consumption since it has a large number of analog components in addition to the digital counterparts To overcome this bottleneck it is crucial to reduce the transceiver s power consumption Recent efforts in the design of integrated circuits have focused on achieving higher levels of integration by including more and more analog functional blocks onto a single silicon CMOS chip Circuits with lower power consumption without degrading the performance are desirable for extending the network life time of the sensor nodes