VLSI design of energy efficient high Speed multipliers based on vedic Mathematics

Abstract

The need for high speed processing has been increasing as a result of newlineexpanding signal processing and cryptography applications To achieve this newlineobjective high speed multipliers and adders which form the core modules newlineare required In addition the different types of applications demand different newlineperformance measures such as scalability reconfigurability high speed low newlinepower consumption regularity of layout and less area or a combination of one newlineor more of these features The modular exponentiation is a common operation used in newlinescrambling and public key cryptosystems and involves repeated iterative newlineapplication of modular multiplication The performance of public key newlinecryptosystems is primarily determined by the implementation efficiency of newlinethe modular multiplication and exponentiation operations There are various newlinereported algorithms to perform modular multiplications The most prominent newlineones are Karatsuba Ofman Algorithm Booth Algorithm Barrett Reduction newlineMethod Montgomery Algorithm In particular Karatsuba Ofman algorithm is newlineconsidered as one of the fastest ways to multiply long integers It is based on a newlinedivide and conquer strategy newline newline