FPGA implementation of an efficient Routing filter design

Abstract

The internet consists of a large collection of routers forming a newlinemesh The routers are connected to each other by a variety of newlinecommunication links The role of this router is to transport the data from newlineone end to the other Communication protocols like Internet Protocol newlineIP break up the data into chunks called IP datagram or packets These newlinepackets travel from the source to their destination through a number of newlinerouters The primary role of this router is to forward an incoming packet newlinefrom the source to the destination along a multi hop path The total newlinequantity of time required for a packet to travel along its path depends on newlinethe forwarding speed of the routers at the nodes newlineFor every incoming packet a search must be performed in the newlinerouters forwarding table to determine which next hop the packet is newlinedestined for So this research presents a mechanism which performs fast newlinelongest matching prefix route lookups in hardware newline newline