Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/26565
Title: Certain investigations on different types of faults of a class of reed muller canonical circuits
Researcher: Neelakantan P N
Guide(s): Ebenezer jeyakumar A
Keywords: canonical circuits
electrical engineering
reed muller
Upload Date: 13-Oct-2014
University: Anna University
Completed Date: 01/12/2011
Abstract: Classically the solutions to the logic circuit design problems have newlinebeen obtained with the criteria to minimize the hardware complexity The newlinetesting problem was considered only after the design of the network was newlinecompleted But in modern designsor the past three decades the testability newlineaspects also have been included as an essential component of the design newlinespecifications itself Similarly while the main considerations in the early newlinedesigns were technology and mathematical tractability oriented only in newlinespecifying devices and structure the modern approaches or solutions will newlineadditionally have to consider the testability of the devices andor the network newlinestructure since the test sets ie the sets of test input patterns depend on the newlinenetwork topology and the devices used newline newline
Pagination: xxiii,150p.
URI: http://hdl.handle.net/10603/26565
Appears in Departments:Faculty of Electrical and Electronics Engineering

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02_certificate.pdf5.95 kBAdobe PDFView/Open
03_abstract.pdf16.84 kBAdobe PDFView/Open
04_acknowledgement.pdf107.89 kBAdobe PDFView/Open
05_contents.pdf49.93 kBAdobe PDFView/Open
06_chapter 1.pdf177.57 kBAdobe PDFView/Open
07_chapter 2.pdf125.58 kBAdobe PDFView/Open
08_chapter 3.pdf65.92 kBAdobe PDFView/Open
09_chapter 4.pdf116.59 kBAdobe PDFView/Open
10_chapter 5.pdf72.88 kBAdobe PDFView/Open
11_chapter 6.pdf353.12 kBAdobe PDFView/Open
12_chapter 7.pdf22.5 kBAdobe PDFView/Open
13_references.pdf30.4 kBAdobe PDFView/Open
14_publications.pdf10.25 kBAdobe PDFView/Open
15_vitae.pdf5.56 kBAdobe PDFView/Open
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