1. Shodhganga@INFLIBNET
  2. Vellore Institute of Technology, Vellore
  3. School of Electronic Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/262629
Title: Energy Efficient Ultra Low Voltage Techniques for Adder and SRAM Circuits
Researcher: Sanapala Kishore
Guide(s): Sakthivel R
Keywords: Engineering and Technology,Engineering,Engineering Electrical and Electronic
University: VIT University
Completed Date: 2019
Abstract: newline
Pagination: I-XII,1-122
URI: http://hdl.handle.net/10603/262629
Appears in Departments:School of Electronic Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File97.18 kBAdobe PDFView/Open
02_declaration and certificate.pdf1.08 MBAdobe PDFView/Open
03_abstract.pdf34.54 kBAdobe PDFView/Open
04_acknowledgements.pdf35.64 kBAdobe PDFView/Open
05_table of contents.pdf245.6 kBAdobe PDFView/Open
06_list of figures.pdf578.4 kBAdobe PDFView/Open
07_list of tables.pdf125.98 kBAdobe PDFView/Open
08_list of abbreviations.pdf135.87 kBAdobe PDFView/Open
09_chapter -1.pdf3.67 MBAdobe PDFView/Open
10_chapter - 2.pdf7.7 MBAdobe PDFView/Open
11_chapter - 3.pdf4.83 MBAdobe PDFView/Open
12_chapter - 4.pdf7.21 MBAdobe PDFView/Open
13_chapter - 5.pdf3.07 MBAdobe PDFView/Open
14_chapter - 6.pdf3.48 MBAdobe PDFView/Open
15_chapter - 7.pdf443.16 kBAdobe PDFView/Open
16_references.pdf1.66 MBAdobe PDFView/Open
17_list of publications.pdf156.14 kBAdobe PDFView/Open
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