An Enhanced Vlsi Algorithm for Modular Multiplication In Cryptography

Abstract

ABSTRACT newlineThe public-key cryptography plays an important role in data security during transmission and reception. The public key cryptosystems such as the Rivest Shamir Aldleman (RSA) algorithm and Elliptic Curve Cryptography (ECC) rely on efficient algorithms for finite field arithmetic. Among the many basic arithmetic operations, the computation of a modular exponentiation and modular inversion are the most time consuming operation. The basic step for these arithmetic operations is the modular multiplication. Any modification in the conventional modular multiplication algorithm will produce a significant advantage in the complex exponentiation and inversion operations. newlineThe first algorithm evolved is the classical modular multiplication algorithm and the second algorithm so far practiced is the Montgomery multiplication algorithm. The third method is the bipartite modular multiplication method. Here, one of the operand is split into two parts and their processing is done in parallel. Finally they are accumulated in a single pipeline unit to produce the net output value. Since they are proposed in parallel their computation time is always less when compared to earlier algorithms. The latest method is the tripartite modular and is still the existing method to implement modular multiplication. Here both the operands are split into halves and the entire algorithm is divided into three phases. The first phase is computed using the classical modular multiplication algorithm. The second phase needs a modular operation and the third phase is computed using the Montgomery modular multiplication algorithm. Thus a systematic approach for maximizing a level of parallelism is followed when performing the modular multiplication. This method reduces the number of single-precision (32 bit processing mode) multiplications by reusing the intermediate partial product. newlineThe proposed modular multiplication algorithm further produces a significant advantage by reducing the hardware consumption and total delay. The proposed modular mult