Certain investigations on VLSI circuits using spectral clustering techniques

Abstract

Recently the scaling of silicon technology is a continuing process The commercialization of devices has made the devices to be miniature size of one tenth of micron There is a demand for the device with high functionality low power consumption and low prize Due to higher level of incorporation circuit drives the power consumption Recently the chip designers face the problem of heat removal and power distribution Urgent demand for low power devices arises from the device long life utility and reliability of battery operated equipment such as wrist watches cardiac pacemakers hearing aid devices and mobile phones The concern of power dissipation is a part of design procedure High operational speeds of the device with minimum area in VLSI circuits are the main constrains The power consumption in VLSI circuits is a serious problem Minimizing in a proper way by introducing power reduction techniques will improve the circuit performance The power consumption in wireless personal area network is one of the major issues To overcome this problem the usages of low power VLSI circuits are suggested For the proper operation of the device the peak power consumption should be less The average power consumption is more critical than peak power consumption because it is directly involved with system battery weight and volume Hence it is important to design various power reduction techniques to reduce power consumption such as peak power and average power This thesis presents the design of various power reduction methods and application of these methods in different VLSI circuits to reduce power consumption newlineIn the first part of work Clock Control Strategy Based Clustering CCSBC is presented The K-Means clustering algorithm is applied to various VLSI circuits to find cluster centers The circuits are re-modified according to the results obtained from K-Means clustering algorithm.