Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/248707
Title: VLSI based minimized composite SBOX and enhanced inverse mixcolumn transformation for AES encryption and decryption
Researcher: J, Balamurugan
Guide(s): E, Logashanmugam
Keywords: Advanced encryption standard
AES algorithm
Cipher
Engineering and Technology,Engineering,Engineering Electrical and Electronic
S-box
VLSI
University: St. Peter s Institute of Higher Education and Research
Completed Date: 2018
Abstract: available
Pagination: 154 p.
URI: http://hdl.handle.net/10603/248707
Appears in Departments:Department of Electronics and Communication

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01_chapter 1.pdfAttached File150.24 kBAdobe PDFView/Open
02_certificate.pdf224.03 kBAdobe PDFView/Open
03_declaration.pdf151.12 kBAdobe PDFView/Open
04_acknowledgement.pdf161.65 kBAdobe PDFView/Open
05_abstract.pdf175.7 kBAdobe PDFView/Open
06_contents.pdf126.6 kBAdobe PDFView/Open
07_list of tables and figures.pdf173.92 kBAdobe PDFView/Open
08_list of abbreviation.pdf90.96 kBAdobe PDFView/Open
09_chapter 1.pdf835.71 kBAdobe PDFView/Open
10_chapter 2.pdf2.36 MBAdobe PDFView/Open
11_chapter 3.pdf1.99 MBAdobe PDFView/Open
12_chapter 4.pdf1.96 MBAdobe PDFView/Open
13_chapter 5.pdf2.67 MBAdobe PDFView/Open
14_chapter 6.pdf446.06 kBAdobe PDFView/Open
15_chapter 7.pdf159.75 kBAdobe PDFView/Open
16_references.pdf336.79 kBAdobe PDFView/Open
17_publications.pdf252.15 kBAdobe PDFView/Open
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