1. Shodhganga@INFLIBNET
  2. St. Peter’s Institute of Higher Education and Research
  3. Department of Electronics and Communication
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/248695
Title: Area efficient and low power implementation for DSP architecture
Researcher: J, Manikandan
Guide(s): M, Manikandan
Keywords: Engineering and Technology,Engineering,Engineering Electrical and Electronic
Hamming codes
OFDM system
Quadrature amptitude modulation
Radix-8 FFT algorithm
Single path delay feedback
VLSI
University: St. Peter s Institute of Higher Education and Research
Completed Date: 2017
Abstract: available
Pagination: 99 p.
URI: http://hdl.handle.net/10603/248695
Appears in Departments:Department of Electronics and Communication

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File141.59 kBAdobe PDFView/Open
02_certificate.pdf106.79 kBAdobe PDFView/Open
03_declaration.pdf81.64 kBAdobe PDFView/Open
04_acknowledgement.pdf83.02 kBAdobe PDFView/Open
05_abstract.pdf98.83 kBAdobe PDFView/Open
06_contents.pdf110.6 kBAdobe PDFView/Open
07_list of tables and figures.pdf87.67 kBAdobe PDFView/Open
08_list of abbreviations.pdf86.23 kBAdobe PDFView/Open
09_chapter 1.pdf116.38 kBAdobe PDFView/Open
10_chapter 2.pdf184.94 kBAdobe PDFView/Open
11_chapter 3.pdf394.94 kBAdobe PDFView/Open
12_chapter 4.pdf1.02 MBAdobe PDFView/Open
13_chapter 5.pdf1.9 MBAdobe PDFView/Open
14_chapter 6.pdf208.41 kBAdobe PDFView/Open
15_chapter 7.pdf95.41 kBAdobe PDFView/Open
16_references.pdf135.63 kBAdobe PDFView/Open
17_publications.pdf101.62 kBAdobe PDFView/Open
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