Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/240214
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dc.coverage.spatialElectronics and Communication Engineering
dc.date.accessioned2019-04-30T08:46:16Z-
dc.date.available2019-04-30T08:46:16Z-
dc.identifier.urihttp://hdl.handle.net/10603/240214-
dc.description.abstractNo newline
dc.format.extentxiv, 107 P
dc.languageEnglish
dc.relationNo. of References-130
dc.rightsuniversity
dc.titleDevelopment of high speed diagonal algorithms for various network on chip topologies
dc.title.alternative
dc.creator.researcherE. Lakshmi Prasad
dc.subject.keywordEngineering and Technology,Engineering,Engineering Electrical and Electronic
dc.description.noteConclusion 90-90, References 91-107
dc.contributor.guideProf. M.N. Giriprasad
dc.publisher.placeAnantapuram
dc.publisher.universityJawaharlal Nehru Technological University, Anantapuram
dc.publisher.institutionDepartment of Electronics and Communication
dc.date.registered20-06-2014
dc.date.completed26-07-2018
dc.date.awarded05-03-2019
dc.format.dimensions---
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File25.02 kBAdobe PDFView/Open
02_certificates&declaration.pdf183.94 kBAdobe PDFView/Open
03_acknowledgement.pdf64.69 kBAdobe PDFView/Open
04_contents.pdf20.43 kBAdobe PDFView/Open
05_preface.pdf47.69 kBAdobe PDFView/Open
06_abstract.pdf47.95 kBAdobe PDFView/Open
07_list of tables and figures.pdf30.68 kBAdobe PDFView/Open
08_chapter-1.pdf206.57 kBAdobe PDFView/Open
09_chapter-2.pdf311.16 kBAdobe PDFView/Open
10_chapter-3.pdf864.96 kBAdobe PDFView/Open
11_chapter-4.pdf4.62 MBAdobe PDFView/Open
12_chapter-5.pdf2.41 MBAdobe PDFView/Open
13_chapter-6.pdf1.95 MBAdobe PDFView/Open
14_chapter-7.pdf74.43 kBAdobe PDFView/Open
15_references.pdf213 kBAdobe PDFView/Open


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