1. Shodhganga@INFLIBNET
  2. Jain University
  3. Department of Electronics Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/239719
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DC FieldValueLanguage
dc.date.accessioned2019-04-29T06:55:18Z-
dc.date.available2019-04-29T06:55:18Z-
dc.identifier.urihttp://hdl.handle.net/10603/239719-
dc.format.extent102 p.-
dc.languageEnglish-
dc.rightsuniversity-
dc.titleDynamically reconfigurable Network on Chip for fault elimination without affecting the Communication between the nodes-
dc.creator.researcherGowda K . Shilpa-
dc.subject.keywordEngineering and Technology,Engineering,Engineering Electrical and Electronic-
dc.contributor.guideK. R. Rekha-
dc.publisher.placeBengaluru-
dc.publisher.universityJain University-
dc.publisher.institutionDepartment of Electronics and Communication Engineering-
dc.date.registered15/02/2014-
dc.date.completed04/10/2018-
dc.date.awarded20/04/2019-
dc.format.accompanyingmaterialNone-
dc.source.universityUniversity-
dc.type.degreePh.D.-
Appears in Departments:Department of Electronics Engineering

Files in This Item:
File Description SizeFormat 
certificate.pdfAttached File195 kBAdobe PDFView/Open
chapter 1.pdf800.78 kBAdobe PDFView/Open
chapter 2.pdf477.65 kBAdobe PDFView/Open
chapter 3.pdf3.26 MBAdobe PDFView/Open
chapter 4.pdf828.54 kBAdobe PDFView/Open
chapter 5.pdf801.2 kBAdobe PDFView/Open
chapter 6.pdf470.25 kBAdobe PDFView/Open
cover page.pdf99.73 kBAdobe PDFView/Open
table of contents.pdf283.52 kBAdobe PDFView/Open
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