Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/234096
Title: Design of low power binary multipliers and their reversible realization using toffoli gates
Researcher: V, Rajmohan
Guide(s): Maheswari, O Uma
Keywords: Electronic
Lowpower
Multiplier
Toffoligates
Transistor
University: Anna University
Completed Date: 2017
Abstract: Abstract available
Pagination: xxii, 133p.
URI: http://hdl.handle.net/10603/234096
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File9.83 kBAdobe PDFView/Open
02_certificate.pdf130.54 kBAdobe PDFView/Open
03_abstract.pdf8.37 kBAdobe PDFView/Open
04_acknowledgement.pdf4.76 kBAdobe PDFView/Open
05_table of content.pdf22.42 kBAdobe PDFView/Open
06_list of table.pdf4.11 kBAdobe PDFView/Open
07_list of figures.pdf22.42 kBAdobe PDFView/Open
08_list of symbol and abbreviations.pdf54.52 kBAdobe PDFView/Open
09_chapter 1.pdf173.89 kBAdobe PDFView/Open
10_chapter 2.pdf579.22 kBAdobe PDFView/Open
11_chapter 3.pdf946.02 kBAdobe PDFView/Open
12_chapter 4.pdf745.95 kBAdobe PDFView/Open
13_chapter 5.pdf38.76 kBAdobe PDFView/Open
14_references.pdf63.3 kBAdobe PDFView/Open
15_list of publication.pdf8.29 kBAdobe PDFView/Open
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